Playlist · Neso Academy

Digital Electronics

by Neso Academy · 202 videos

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1d 5h 40m

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202 videos in blocks of 10 · each column is a block's total, to scale

2h 9m

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Videos (202)

1d 5h 40m in total · tick what you've watched

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Videos to
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1 What is Signal? 8:56 2015-03-29
2 What is an Analog Signal? 9:11 2015-03-29
3 What is Digital Signal? 8:48 2015-10-27
4 Need of Digital Signals 5:13 2015-10-24
5 Introduction to Digital Electronics 6:38 2015-04-05
6 Switch and Bits Intuition 9:35 2015-10-17
7 Introduction to Boolean Algebra (Part 1) 18:11 2015-04-07
8 Introduction to Boolean Algebra (Part 2) 10:01 2015-04-07
9 Boolean Algebra Examples (Part 1) 7:48 2015-04-07
10 Boolean Algebra Examples (Part 2) 5:53 2015-04-12
11 Redundancy Theorem (Boolean Algebra Trick) 7:32 2015-04-12
12 Sum of Products (Part 1) | SOP Form 12:30 2015-04-17
13 Sum of Products (Part 2) | SOP Form 8:00 2015-04-17
14 Product of Sums (Part 1) | POS Form 11:06 2015-04-18
15 Product of Sums (Part 2) | POS Form 5:47 2015-04-18
16 SOP and POS Form Examples 12:38 2015-04-19
17 Minimal to Canonical Form Conversion (Part 1) 8:39 2015-06-06
18 Minimal to Canonical Form Conversion (Part 2) 5:29 2015-06-06
19 Examples & Tricks (SOP and POS Forms) 12:08 2015-06-15
20 Positive and Negative Logic 5:23 2015-06-15
21 Dual Form 10:06 2015-08-09
22 Self Dual 9:32 2015-10-02
23 Complement Meaning and Examples 7:01 2015-10-29
24 Venn Diagram 5:46 2015-10-29
25 Switching Circuits (Part 1) 11:27 2015-10-18
26 Switching Circuits (Part 2) 12:17 2015-10-19
27 Statement Problems in Boolean Algebra (Part 1) 3:38 2015-10-19
28 Statement Problems in Boolean Algebra (Part 2) 6:36 2015-10-19
29 Introduction to Number Systems 9:15 2015-11-03
30 Binary Number System 8:25 2015-11-03
31 Decimal to Binary Conversion 9:53 2015-11-04
32 Decimal to Octal Conversion 4:44 2015-11-05
33 Decimal to Hexadecimal Conversion 6:11 2015-11-05
34 Binary to Decimal Conversion 5:36 2015-11-06
35 Octal to Decimal Conversion 5:34 2015-11-09
36 Hexadecimal to Decimal Conversion 4:37 2015-11-09
37 Octal to Binary & Binary to Octal Conversion 6:14 2015-11-11
38 Hexadecimal to Binary & Binary to Hexadecimal Conversion 6:49 2015-11-14
39 Hexadecimal to Octal & Octal to Hexadecimal Conversion 5:11 2015-11-14
40 Binary Addition 8:02 2015-11-20
41 Binary Subtraction 5:04 2015-11-16
42 Binary Multiplication 8:14 2015-11-18
43 Binary Division 5:33 2015-11-19
44 Octal Addition 6:07 2015-11-20
45 Octal Subtraction 3:00 2015-11-20
46 Octal Multiplication 4:39 2015-11-20
47 Hexadecimal Addition 5:53 2015-11-23
48 Hexadecimal Subtraction 3:52 2015-11-23
49 Hexadecimal Multiplication 6:04 2015-11-23
50 r's Complement 6:21 2015-11-23
51 (r-1)'s Complement 8:02 2015-11-23
52 1's and 2's Complement 4:41 2015-11-23
53 Shortcut for 2's Complement 3:21 2015-11-23
54 Data Representation using Signed Magnitude 5:59 2015-11-25
55 Data Representation using 1's Complement 3:26 2015-11-25
56 Data Representation using 2's Complement 7:46 2016-01-29
57 Binary Subtraction using 1's Complement 12:04 2016-02-11
58 Binary Subtraction using 2's Complement 13:13 2016-02-25
59 Classification of Codes 8:19 2016-02-25
60 Binary Coded Decimal (BCD) Code 16:46 2016-02-29
61 BCD Addition 13:37 2016-03-01
62 Shift Add 3 Method | Simple method for Binary to BCD conversion 4:32 2014-10-20
63 2421 Code 8:38 2016-03-04
64 Excess-3 Code (XS-3 Code) 11:50 2016-03-01
65 Excess-3 Code Addition 9:42 2016-03-02
66 Introduction to Gray Code 6:05 2016-03-03
67 Binary to Gray Code Conversion 7:29 2016-03-03
68 Gray Code to Binary Conversion 5:37 2016-03-05
69 What is Parity? 8:32 2014-10-17
70 Hamming Code | Error Detection 12:20 2015-01-20
71 Hamming Code | Error Correction 5:32 2015-01-20
72 Logic Gates (Part 1) 16:26 2016-03-07
73 Logic Gates (Part 2) 14:14 2016-03-08
74 Logic Gates (Part 3) 12:40 2016-03-09
75 Logic Gates (Part 4) 10:51 2016-03-09
76 Logic Gates (Part 5) | Important! 19:35 2016-03-11
77 Logic Gates (Part 6) | Important! 14:13 2016-03-11
78 NAND Gate as Universal Gate (Part 1) 8:56 2016-03-14
79 NAND Gate as Universal Gate (Part 2) 12:22 2016-03-14
80 NOR Gate as Universal Gate 14:22 2016-03-19
81 Karnaugh Map (K' Map) - Part 1 25:45 2014-09-02
82 Karnaugh Map (K' Map) - Part 2 14:21 2014-09-02
83 Karnaugh Map (K' Map) - Part 3 10:31 2014-09-02
84 K' Map and Implicants 9:08 2014-09-02
85 4 Variable Karnaugh Map (Part 1) 11:17 2014-09-02
86 4 Variable Karnaugh Map (Part 2) 8:21 2014-09-02
87 4 Variable Karnaugh Map (Part 3) 5:36 2014-09-05
88 Don't Care in Karnaugh Map (K' Map) 10:05 2014-09-05
89 Don't Care in K' Map (Response to Doubt) 6:19 2014-10-05
90 K' Map using Max Terms (Part 1) 7:58 2014-09-13
91 K' Map using Max Terms (Part 2) 11:27 2014-09-13
92 5 variables K' Map 10:46 2014-09-13
93 Quine-McCluskey Minimization Technique (Tabular Method) 23:43 2015-10-14
94 Digital Electronics Previous Year Solution of DRDO & ISRO (Part 2) 7:53 2014-09-13
95 Digital Electronics Previous Year Solution of DRDO & ISRO (Part 3) 7:05 2014-09-13
96 4-Bit Even Parity Generator 10:19 2014-10-17
97 Seven Segment Display Decoder 6:58 2014-10-18
98 Seven Segment Display Decoder (Part 2) 8:36 2014-10-18
99 Seven Segment Display Decoder (Part 3) 7:57 2014-10-18
100 Comparison between Combinational and Sequential Circuits 6:16 2014-10-18
101 Half Adder 5:10 2014-10-18
102 Full Adder 13:38 2014-10-20
103 Full Adder using Half Adder 7:19 2015-10-20
104 4 Bit Parallel Adder using Full Adders 10:27 2015-10-20
105 Half Subtractor 6:56 2014-10-20
106 Full Subtractor | Easy Explanation 7:42 2014-10-20
107 Realizing Half Adder using NAND Gates only 6:16 2014-10-21
108 Realizing Half Adder using NOR Gates only 5:02 2014-10-21
109 Realizing Full Adder using NAND Gates only 6:12 2014-10-21
110 Realizing Half Subtractor using NAND Gates only 6:52 2014-10-22
111 Realizing Half Subtractor using NOR Gates only 4:45 2014-10-24
112 Realizing Full Subtractor using NAND Gates only (Part 1) 9:28 2016-10-26
113 Realizing Full Subtractor using NAND Gates only (Part 2) 5:45 2016-10-26
114 2-Bit Multiplier Using Half Adders 9:49 2016-05-13
115 Carry Lookahead Adder (Part 1) | CLA Generator 6:25 2014-10-28
116 Carry Lookahead Adder (Part 2) | CLA Adder 11:19 2014-10-28
117 BCD Adder | Simple Explanation 15:27 2014-11-02
118 Introduction to Multiplexers | MUX Basic 12:27 2014-12-06
119 4X1 Multiplexer 5:52 2014-12-08
120 8X1 Multiplexer 5:51 2014-12-08
121 MUX Tree Basic | 4X1 MUX using 2X1 MUX | Easy Explanation 7:15 2014-12-09
122 Implementing 8X1 MUX using 2X1 MUX 5:26 2014-12-09
123 Implementing 8X1 MUX using 4X1 MUX (Special Case) 7:07 2014-12-09
124 32X1 MUX using 8X1 MUX 14:58 2015-10-15
125 Implementation of Boolean Function using Multiplexers 8:34 2015-01-07
126 1-Bit Full Adder using Multiplexer 8:37 2015-01-07
127 Logical Expression from Multiplexer 5:46 2015-01-09
128 Introduction to Demultiplexer | 1:2 DEMUX 9:59 2015-10-26
129 1:4 Demultiplexer 6:21 2015-10-26
130 Full Subtractor using 1:8 Demultiplexer 8:20 2015-10-29
131 Demultiplexer as Decoder 5:45 2015-10-30
132 2-Bit Comparator 5:31 2015-01-09
133 Introduction to Encoders and Decoders 6:52 2015-01-23
134 Priority Encoder 10:50 2015-01-23
135 Decimal to BCD Encoder 3:25 2015-01-23
136 Octal to Binary Encoder 4:56 2015-01-28
137 Hexadecimal to Binary Encoder 4:27 2015-01-28
138 Full Adder Implementation using Decoder 5:50 2015-01-28
139 Practice Problems on Combinational Circuits (Part 1) 11:39 2015-02-27
140 Practice Problems on Combinational Circuits (Part 2) 9:58 2015-03-02
141 Practice Problems on Combinational Circuits (Part 3) 11:04 2015-03-10
142 Practice Problems on Combinational Circuits (Part 4) 9:13 2015-03-18
143 Introduction to Sequential Circuits | Important 8:25 2015-02-01
144 SR Latch | NOR and NAND SR Latch 16:42 2015-04-20
145 What is a Clock? 5:51 2015-02-02
146 Triggering Methods in Flip Flops 4:39 2015-02-08
147 How to get Edge Triggering | Simulation using Multisim 11:02 2015-03-15
148 Difference between Latch and Flip Flop 5:33 2015-02-09
149 Introduction to SR Flip Flop 8:23 2015-02-09
150 Truth Table, Characteristic Table and Excitation Table for SR Flip Flop 8:56 2015-02-09
151 Introduction to D flip flop 4:35 2015-02-09
152 Truth Table, Characteristic Table and Excitation Table for D Flip Flop 4:10 2015-02-09
153 Introduction to JK flip flop 7:46 2015-02-18
154 Truth Table, Characteristic Table and Excitation Table for JK flip flop 9:56 2015-02-18
155 Race Around Condition or Racing in JK Flip Flop 8:58 2015-02-24
156 Master Slave JK Flip Flop 9:08 2015-02-25
157 Behaviour of Master Slave D Flip Flop 11:48 2015-03-21
158 Introduction to T flip flop 3:21 2015-02-25
159 Truth Table, Characteristic Table and Excitation Table for T flip flop 5:25 2015-02-25
160 5 Steps for Flip Flop Conversions | JK to D Flip Flop Conversion 6:58 2015-02-26
161 T Flip Flop to D Flip Flop Conversion 4:00 2015-02-26
162 SR Flip Flop to JK Flip Flop Conversion 7:53 2015-02-27
163 SR Flip Flop to T Flip Flop Conversion 6:29 2015-02-27
164 Preset and Clear Inputs in Flip Flop 5:32 2015-03-15
165 Introduction to State Table, State Diagram & State Equation 10:34 2015-03-16
166 Design Procedure for Clocked Sequential Circuits 19:06 2015-03-23
167 Mealy and Moore State Machines (Part 1) 9:39 2015-03-17
168 Mealy and Moore State Machines (Part 2) 4:21 2015-03-17
169 Analysis of Clocked Sequential Circuits (with D Flip Flop) 13:30 2015-03-17
170 Analysis of Clocked Sequential Circuits (with JK Flip Flop) 12:50 2015-03-18
171 Analysis of Clocked Sequential Circuits (with T Flip Flop) 8:35 2015-03-18
172 Sequence or Pattern Detector 9:02 2015-03-21
173 Sequence Detector (Example) 15:39 2015-03-22
174 State Reduction and Assignment 7:05 2015-03-22
175 ASM Chart 6:26 2015-03-22
176 ASM Chart for Moore State Machine 6:41 2015-03-23
177 Difference between Synchronous and Asynchronous Sequential Circuits 2:56 2015-03-15
178 Introduction to Counters | Important 11:40 2015-03-12
179 Types of Counters | Comparison between Ripple and Synchronous counters 7:07 2015-03-25
180 3 Bit Asynchronous Up Counter 11:48 2015-03-25
181 4 Bit Asynchronous Up Counter 9:32 2015-03-25
182 3 bit & 4 bit Asynchronous Down Counter 10:22 2015-03-28
183 3 Bit & 4 Bit UP/DOWN Ripple Counter 10:20 2015-03-28
184 Modulus of the Counter & Counting up to Particular Value 13:30 2015-03-30
185 State Diagram of a Counter 7:18 2015-03-27
186 Decade (BCD) Ripple Counter 9:20 2015-04-02
187 How to Design Synchronous Counters | 2-Bit Synchronous Up Counter 12:57 2015-04-02
188 3-Bit Synchronous Up Counter 12:26 2015-04-02
189 3-Bit & 4-bit Up/Down Synchronous Counter 19:44 2015-04-04
190 Ring Counter 14:21 2015-04-05
191 Johnson's Counter (Twisted/Switch Tail Ring Counter) 7:39 2015-04-05
192 Introduction to Registers 7:15 2015-04-09
193 Data Formats and Classification of Registers 7:27 2015-04-11
194 Shift Register (SISO Mode) 11:30 2015-04-11
195 Shift Register (SIPO & PIPO Mode) 11:53 2015-04-18
196 Shift Register (PISO Mode) 7:26 2015-05-09
197 Bidirectional Shift Register 7:57 2015-05-11
198 Universal Shift Register 15:38 2015-05-24
199 Practice Problems on Sequential Circuits (Part 2) 7:17 2015-06-04
200 Practice Problems on Sequential Circuits (Part 3) 5:53 2015-06-06
201 Programmable Logic Array (PLA) | Easy Explanation 10:41 2014-10-24
202 Programmable Array Logic (PAL) 9:34 2015-01-09
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